datapath

A simple "database" that use JSON file for Node.JS.

Browser-based Arm micro-architecture simulator with single-cycle and pipelined CPU visualization (educational, simulator)

loxilb ebpf sub-module

A 32-bit MIPS processor used Altera Quartus II with Verilog.

A Hybrid Framework to Build High-performance Adaptive Neural Networks for Kernel Datapath

北京邮电大学 2023-2024 春季学期《计算机组成原理》课程实验集合

Repositório para as aulas, exercícios e resumos da matéria: organização e arquitetura de computadores (INE5607).

simulating connection of micro processor and accelerator on a bus context with systemc language

Design and implementation of a 16-bit CPU in Logisim, featuring a custom datapath, ALU, memory operations, branching, and exception handling. Created for the "Computer Systems & Architecture" 1st bachelor course at the University of Antwerp.

Assignment from the Advanced Computer Architecture class.

CSE-306-Computer-Architecture Offline / Assignment on ALU, Floating Point Adder and 8 bit MIPS Datapath along with pipelining

This is a website for demonstration of how most of the basic instructions work in MIPS architecture

High-performance Rust datapath for SMIP-MWP. Zero-copy AF_XDP networking with integrated crypto (AES-256-GCM + ChaCha20-Poly1305), lock-free routing, and post-quantum key exchange. Engineered for maximum throughput and minimal latency on modern hardware.

Finite state machine controlled RISC machine

A unified repository managing the Mohawk network stack. Integrates Go control planes (AF_XDP host integration & bridge request ingestion) with Rust datapaths (routing, crypto, & consumer mechanisms) under a shared bridge contract

MIPS Multicycle CPU design in Verilog

Calculadora eletrônica feita no simulador Circuit Verse, realiza soma de 2 números de 0 a 99, conversão bin2dec e dec2bin.

Interactive CPU Datapath Simulator made to educate students on the MIPS architecture

RISC-V Single Cycle Datapath Implementation in Verilog

1052_計算機組織 COMPUTER ORGANIZATION