[ainyan03]

For #431.

Wake source

On a ToughC5 started by the PM1 timer, WAKE_SRC reads 1 before M5.begin() and 0 after it. A capture of the internal I2C shows why:

1. The first read of the PM1 in Power.begin() is NACKed, so M5PM1_Class::begin() fails.
2. The board setup continues and clears WAKE_SRC about 9 ms later. The IRQ output needs this.
3. The second begin() succeeds, but the value is already gone.

This PR retries the first read and keeps WAKE_SRC before it is cleared. M5.Power.M5pm1.getWakeSource() returns the kept bits, which match m5pm1_wake_src_t of the M5PM1 library. The register is still cleared as before, so the IRQ behavior does not change.

PaperMono cleared WAKE_SRC before its first begin(), so it now calls begin() first.

On ToughC5 and PaperMono, getWakeSource() of the M5PM1 library still returns 0 after M5.begin(). Use M5.Power.M5pm1.getWakeSource() there.

Measured over repeated PM1 timer power-ons:

Board, start	getWakeSource()	WAKE_SRC after M5.begin()
ToughC5, timer, 9 boots	1	0
PaperMono, timer, 3 boots	1	0
Both, after flashing or a reset	0	0

ToughC5 M-Bus pins

getPin() now returns the M-Bus pins of ToughC5, matching the V0.6 schematic and PCB. mbus_pin17 to mbus_pin20 are G2 and G3, and mbus_pin8 is G4, which the PM1 IRQ output also drives. The board catalog change is in m5stack/M5GFX#393.

Checks

• ToughC5, PaperMono, StopWatch, StampS3Bat and CoreMatrix start and detect correctly. StopWatch's begin time is unchanged.
• Fork CI passed, with no new warnings.