If you want to use our EDA tools, the easiest way is to install the binary release OSS CAD suite, which contains all required dependencies and related tools. Find the documentation here. We also have an OSS CAD Suite github action for using the tools in a github CI workflow.
Tabby CAD Suite is a commercial extension of OSS CAD Suite available from YosysHQ GmbH that additionally includes the Verific frontend for industry-grade SystemVerilog and VHDL support, formal verification with SVA, and formal apps.
- Yosys: a framework for RTL synthesis tools
- nextpnr: place and route for FPGA architectures. Supported architectures: iCE40 (Project Icestorm), ECP5 (Project Trellis), Nexus (Project Oxide), Gowin (Project Apicula) and more!
Front-ends for applications built on top of Yosys:
Other notable projects:
- riscv-formal: formally check compliance with the RISC-V specification
- picorv32: A Size-Optimized RISC-V CPU
- nerv: A very simple educational RISC-V CPU for demonstrating riscv-formal
- Join us on Slack!
- We have weekly dev meetings open to all. Find the link on #devel-discuss in slack if you have a PR or issue you want to discuss with us.
- IRC: #yosys on libera.chat
- Mastodon: https://fosstodon.org/@yosyshq
Like what we do? Please consider either buying a license for the Tabby CAD Suite or becoming a sponsor.
